Integrated circuit packages comprising two or more integrated circuit die are becoming increasing popular. Such packages, including, for example, stacked die packages, Package on Package (PoP), multi-chip modules and the like, offer increased circuit densities that may enable smaller end-product form factors, for example, smart phones.
Unfortunately, testing such packages, or the individual integrated circuit dice that make up such packages, is fraught with challenges. For example, many such integrated circuit arrangements require that all integrated circuit packages and/or dice must be electrically coupled in order to test any single die. Under such an arrangement, fault isolation may be difficult at best. In addition, test fixture parasitic effects, e.g., from long leads, may limit the speed and/or effectiveness of such testing.